Job Description

Job Description

Come join Intel's Atom CPU organization as a SoC Design Engineer in Design Automation. We create innovative technologies to build one of the most complex IA microprocessors on the planet. The Atom CPU is the heart of Intel's high performance and low-power SOCs for 5G, Autonomous Driving, AI and Machine Learning.

Your responsibilities in this highly visible role will include but not be limited to: -

* Develop, support and drive project execution performance verification flows and methodology for cell-based and/or transistor-based designs.

* Drive solutions to perform sign-off verification using both external Engineering Design Automation (EDA) tools and internal CAD tools for back-end design work (Extraction, Static Timing Analysis, electrical rule checks, circuit checking quality, Static Noise analysis, ECO, SPICE circuit simulation)

* Partner with CPU design team engineers to highlight issues, debug complex problems and develop innovative solutions for analysis debug, flow scripts and timing signoff

* Creates flows/scripts to analyze, test and improve design methodologies

* Develops custom optimized solutions to address design requirements for latest technology nodes

* Provide technical direction by identifying gaps in current EDA solutions and drive enhancements through vendors

* Contribute to the development of multidimensional designs involving the layout of complex integrated circuits.

* Expand and standardize design methodologies, especially those related to static timing analysis, cross-clocking domains, and multiple power domain analysis.

* Documenting and helping with guidelines/specs

The ideal candidate should exhibit the following behavioral traits:

* Inter-personal, clear communication and teamwork skills.

* You need to possess a can-do attitude, are driven by research, problem-solving, and thrive on challenges.

* Self-motivator with strong problem solving skills

Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidate must have a Bachelors degree with 12+ years of experience or Masters degree with 8+ years of experience in Electrical/Computer Engineering or related field
6+ years of experience with:

* Design principles and techniques in VLSI back-end design, custom-circuit (transistor) design and/or memory design

* UNIX/Linux environments and Perl/Tcl/Shell/Python scripting

* Design Automation and/or CAD for CPUs or SOCs, including timing closure of gate level and/or transistor level designs (RLS, SPICE) in advanced CMOS processes

* Industry standard Engineering Design Automation (EDA) VLSI tools from Synopsys/Cadence in one or more of the following: Timing/Power optimization, ECO, Static Timing Analysis, SPICE circuit simulation, statistical variation analysis, noise, cross-talk, OCV and/or ERC flows

Preferred qualifications:
6+ years of experience with:

* Machine-learning methods to solve complex problems dealing with automation of circuit design to aid in performance and power improvement.

* Synopsys Tcl coding

* In-house Intel tools for high-speed custom digital designs

* Demonstrated proficiency with backend design EDA tools Synopsys, Cadence and/or Mentor Graphics
Inside this Business Group
The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.

Other Locations
Virtual US and Canada;

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USJR0153731Austin