Job Description

Job Description

Work with Xeon Server CPU validation team who enables future generations of CPUs that power Cloud, Enterprise, and Data Centers. We're part of Silicon development organization within Data Center validation team, and we're looking for motivated, passionate, talented engineers to join our System Validation team. We're technically strong and vibrant cross-site team.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to get results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world one product at a time. If you have this type of passion, please read on to learn about the Job Qualifications for this role. We welcome your application.

As a Memory Validation Technical Lead/Senior Engineer, your job responsibilities would include:

* Strategy definition, test plan & content development, content checkout in Pre-Si (using virtual platforms & emulation) and debugging Post-Si failures
* Strategy phase includes identifying overall validation requirements (DFx, validation test tools, debug tools, BIOS, Boards, etc.) needed to deliver high quality memory validation
* Effectively interface with Architecture, Design, and Pre-silicon Validation teams to improve Post-silicon test content as well as provide feedback for future on-die debug features

In addition to the qualifications listed below, the ideal candidate will also have:

* Tenacity to drive difficult memory related validation issues to root-cause, solution, and prevention, leveraging your growth mindset
* Passion for delivering high quality products to demanding customers
* Strong verbal, written, and interpersonal communication skills with both technical and non- technical audiences
* A passion for problem solving, utilizing your analytical and debug skills
* Willingness to work effectively, and get results, in a cross functional team environment, throughout product life cycle

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

The candidate must have a Bachelors degree in Electrical Engineering or Computer Science and 6+ years of experience -OR- a Masters degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience in:

Hardware architecture/microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below:

* Intel IA - IA32 architecture with uArch debug knowledge of Intel's Core and Uncore or equivalent architecture
* Memory Controller / DDR (2/3/4) memory architecture and debug
* LPDDR experience is a plus
* C/Python SW programming for content development and scripting
* Jedec/DDR protocol experience
* Post-Si validation
* CPU micro-architecture
* Silicon debug skills
* Design, verification or validation disciplines, system/platform level debug
* Logic Analyzer, Oscilloscope
* Test Automation Frameworks

Preferred Qualifications

Experience at least one of the following domain Industry spec, associated technologies and architecture:

* Experience in validation and Debug flows of a complex CPU Silicon with Pre-silicon Design / Validation methodology knowledge and Verilog/VHDL and EDA design tool
* Knowledge of IA/ARM core and system level Power Management architecture
* Familiar in PMC feature, VID setting, Gate/Chip level power management transition state, etc.
* Drive validation knowledge exchange with development of validation plans

Inside this Business Group
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.

Other Locations

US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0142742Hillsboro