Job Description

Job Description

About the team:

The position offered is for a Design Automation Engineer in the Custom Layout Team of the Process Design Kit (PDK) group, within the Design Enablement (DE) organization.

Responsibilities are focused around development and support of PDK components relating to Custom Layout; primarily EDA technology files and parameterized cell development.

The team plans, executes, deploys, and supports these solutions in a timely manner.

Development and automated QA flows involve writing efficient code in scripting languages to automatically translate Intel process technology rules and requirements into vendor specific technology library file formats.

About the role:

Additionally, the custom layout team works with internal and external customers to ensure that they are enabled with a productive design environment using Intel's advanced process technologies on external Electronic Design Automation (EDA) tools. This includes functioning as an interface between end-users and EDA suppliers. Some key responsibilities are the following:

* Develops and tests Engineering Design Automation tools, creates flows/scripts to analyze and test design methodologies.
* Specifies materials, equipment and supplies required for completion of projects. Evaluates vendor practical capabilities to provide required products or services.
* Responsible for designing, deploying and testing efficiency of tools to utilize in achieving design goals and collaborating with design teams on methodology development.
* Design Automation Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality.

Important behavior traits we look for:

* Behavioral history with respect to quality
* Customer orientation
* Problem-solving skills

Qualifications

Possess a Bachelors in Electrical Engineering, Computer Science, or Computer Engineering with 4+ years of industry experience or Masters in Electrical Engineering, Computer Science, or Computer Engineering with 3+ years industry experience.

Experience required in the following areas:

* Custom layout experience within a DA role involving backend EDA tools (layout editors, tech files, Pcells, auto-routing, SKILL macros, environment, etc.) and design rule familiarity on advanced process nodes.
* Programming languages such as C++, Python, Ruby, or Tcl as well as experience in using the UNIX/Linux operating system is a requirement.
* Ability to understand and model layout design rule concepts is also a requirement.

designenablement

Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0154527Hillsboro