Job Description

Job Description

The Intel Architecture, Graphics and Software Group's (IAGS) Financial Services Engineering team helps shape future software and platforms used by key customers to solve the world's most challenging problems. To further this mission, we are seeking a motivated HPC Software Applications Engineer to drive transformational performance leadership in the Financial Services vertical, with particular experience in computational finance, risk and low latency trading.

Come join a world class engineering team, comprised of application engineers and computer architects, to help redefine how the world develops computational finance applications. This position offers an opportunity to advance computing technology by implementing advanced applications hosted on novel computing platforms in collaboration with ISV and end-user customers and contribute to the development of Intel's future intellectual property and architectures. As part of this role, a successful candidate will drive optimization and benchmarking projects that lead to unprecedented workload concurrency in leading applications, system software, and developer tools.

The ideal location for this position is Intel's office in Parsippany, NJ, which is geographically close to the NYC Financial Services hub. Strong candidates who possess significant qualifications, however, may also be located in another of Intel's offices in the surrounding area, or virtually from a home office

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's degree with 6+ years of experience or Master's degree with 4+ years of experience or Ph.D. with 2+ years of experience in Computer Engineering, Computer Science, or other relevant discipline.

6+ years experience in:

* Development, performance analysis and optimization
* Excellent knowledge of Hardware and Software parallel architectures
* Demonstrated proficiency in C, C++, parallel programming (e.g., OpenMP, SIMD), and Python.
* Expertise using distributed and shared memory parallelism is a must have.
* Experience in performance optimization of applications on Intel Architecture.
* Basic working knowledge of HW handling, CPU upgrades, providing lab support

Preferred Qualifications:

* In-depth knowledge of GPU programming, OpenCL
* Experience in migrating applications from datacenter to cloud (AWS, Azure, GCP)
* Experience in cloud technologies such as Kubernetes, containers is plus
* Experience in AI/ML frameworks, containers and data preparation processes.
* Computation finance domain-specific experience.

Behavioral Traits:

* Excellent customer communication and collaboration skills.
* Mix of creativity and analytical skills who can deliver results quickly.
* Demonstrated innovations in computational finance algorithms through publications

Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.

Other Locations

US, Oregon, Hillsboro

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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