Job Description

Job Description

Join Intel-and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join us-and help us create the next generation of technologies that will shape the future for decades to come.

This role will encompass enabling, qualifying, and debugging RTL synthesis tools and flows, auto-place-and-route tools, parasitic extraction flows, and final timing sign-off tools, through automation scripting and manual testing, on a team that focuses on enabling Intel technology RnD.

You will be one of the first people to run design flows on Intel's newest technology and be positioned to influence how the technology and design methodologies are defined for Intel.

As a Digital Design Automation Engineer, your responsibilities will include but not be limited to:

Writing unit-level tests for continuous integration in a design environment and writing automation that can identify quality issues.

Help users that find corner cases to find workarounds and find ways to create self-service troubleshooting.

Enable version control and data management systems for archiving/branching digital IC designs for technology pathfinding.

Design Automation Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality.

This is an entry level position and compensation will be given accordingly.

Qualifications
 

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.

Minimum Qualifications:

Candidate must have a Bachelor's, Master's or Ph.D. in Electrical Engineering, Computer Engineering.

6+ months of experience in the following:

VLSI design with the typical RTL-APR flow such as: RTL, simulation, validation, synthesis, APR, extraction, and timing/characterization.

Debugging of Synopsys digital design tools and flows such as: PrimeTime, ICC2, Fusion Compiler, Finesim, Verdi

UNIX or Shell

Perl or Python

Preferred Qualifications:

Strong coder with proven background of writing automation scripts and programs

Experience in writing unit tests for CI/CD and contributing code to a team project

Expertise in finding ways to 'work around' issues in design flows