Job Description

Job Description
At Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. Were committed to fostering an environment for every teammate thats welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.

Position Overview:

Boeing Defense Space & Security seeks experienced Digital ASIC-FPGA Design Engineers to support the Satellite Capabilities organization and multiple satellite product lines based in El Segundo, CA.

Position Responsibilities:

* Utilize high-level architectural documentation along with algorithm description and implement DSP functions for functions such as decimation, interpolation, general filtering, up-down conversion, digital beam forming, channelization, and be able to develop mathematical models in SystemVerilog to verify design implementation and develop and run scripts and make files.
* Utilize understanding of system requirements to architect block level design specifications
* Prepare detailed design documentation
* HDL coding, logical equivalency checking, static timing analysis, CDC, linting
* Integration of third-party IP
* Create self-checking and reusable test benches from scratch, utilizing Object Oriented Programming concepts: Inheritance, Polymorphism, etc.
* Develop Functional Coverage Models and closing Code Coverage

This position must meet Export Control compliance requirements, therefore a US Person as defined by 22 C.F.R. 120.15 is required. US Person includes US Citizen, lawful permanent resident, refugee, or asylee.

Basic Qualifications (Required Skills/Experience):

* Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry
* Five (5) or more years of experience in digital ASIC/FPGA design and verification
* Three (3) or more years of work experience using Verliog or SystemVerilog.

Preferred Qualifications (Desired Skills/Experience):

* Bachelor's degree and 7 or more years' experience in digital ASIC/FPGA design and verification, Master's degree with 5 or more years' experience in digital design/verification, or PhD degree with 2 or more years experience in digital design/verification.
* Work experience writing Universal Verification Methodology (UVM) sequences and virtual sequences.
* Work experience using Linux or Unix terminal commands.
* Experience using scripting languages: Make, Perl, Python, shell scripts, etc.
* Experience using Revision Control Systems: Subversion (SVN), CVS, Git.
* Work experience writing requirements specification documents.
* Work experience writing architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).
* Work experience performing RTL synthesis.
* Work experience performing Static Timing Analysis and correcting timing violations.
* Work experience simulating a digital design using hardware verification languages: SystemVerilog and SystemVerilog Assertions.
* Work experience using Object Oriented Programming concepts: Inheritance, Polymorphism, etc.
* Work experience using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.
* Work experience creating a self-checking simulation test benches from scratch.
* Educational or work experience using object oriented programming (OOP), e.g. Java, Python, Ruby, C++, Objective-C, Visual Basic .NET, Smalltalk, Curl, Delphi, Eiffel, SystemVerilog.

Typical Education and Experience
Degree and typical experience in engineering classification: Bachelor's and 7 or more years' experience, Master's degree with 5 or more years' experience or PhD degree with 2 or more years' experience. Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry. ABET is the preferred, although not required, accreditation standard.

This position offers relocation based on candidate eligibility. Basic relocation is available for internal candidates.

Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.

Experience Level
Individual Contributor
Contingent Upon Program Award
No, this position is not contingent upon program award

Schedule
Full time

Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.