Job Description

Job Description

The MPE DRV and Fuse team in Santa Clara is looking for a motivated Engineer to join the team to work in the highly challenging environment of product development across Intels server families In this position the engineer gets the unique opportunity to work right from the early stages of design to finally taking the product to silicon and powering it on Engineers work on architecture definitions creating test plans and presilicon test cases and validate them in a simulation emulation environment.

The team is responsible for developing the DFT and HVM Reset flows needed for maufacturing and taking them through production ramp.

Responsibilities of the engineers may include but not be limited to:

* DFT Design Design for Test PreSilicon validation of reset test content at IP and full chip level including test writing

* Test content generation of patterns to support HVM testers

* Silicon debug to identify functional and DFT related bugs and silicon characterization to validate IP Support platform and system level validation teams to identify and close silicon issues

* Analysis and disposition of early customer returns to drive understanding of design marginalities or develop test content to screen these units where needed

* Work with Sort and Class team to deliver high quality test content and support improving PHIs

In addition to the qualifications listed below the ideal candidate will also have:

* Excellent communication skills

* Self motivated

* Detailed oriented

* Flexible to cross trained into respective functional areas

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess a Bachelors degree in Electrical/Electronic Engineering or equivalent with 2+ years of experience OR a Masters degree in Electrical/Electronic Engineering or equivalent with 1+ years of experience in the following:

* Knowledge of Logic validation

* Knowledge of computer architecture, logic and Circuit design

* Experience in programming languages (i.e. Perl, Python, C etc.)

Preferred Qualifications:

* Silicon characterization

* Experience in DFT hardware testing methods and tools
Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0154722Santa Clara