Job Description

Job Description

Come and join us! Intel is seeking a highly qualified candidate to join the IP Firmware Architecture team within the IP Engineering Group IPG IPG develops soft and hard IPs that enable the creation of Intel products nbspAs an IP Firmware Architect you will help define Intel's approach for the co-development and validation of IP hardware and firmware for a variety of technologies including IO memory cache coherent fabrics and other technologies You will be responsible for the design and implementation of proof of concept prototypes tools and the design of processes necessary for the development amp validation of industry leading IPs!

Qualifications

You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications

Candidate must have a Bachelors degree in Computer Science Computer Engineering Electrical Engineering or equivalent

10 years of industry experience in with the following:

* Working with cross functional Platform SoC andor IP teams including Architecture Design Firmware and Validation in the development of highvolume production silicon or boardlevel products
* Architecture and development of lowlevel softwarefirmware requiring direct interaction with hardware
* Development of processes and tools used for SoC IP andor Platform design and validation
* Design and development of test infrastructure and the associated validation or verification testing
* Working on a large firmware project andor the associated test infrastructure necessary to deliver silicon that has shipped in high volume
* SWFW development skills across various programming languages and development environments
* Technical communication in various technical and nontechnical scenarios
* Working across organizations geographies and companies to drive technical direction and collaborate to solve technical issues
* Solving complex system level problems involving both technical and nontechnical constraints

Preferred Qualifications

* Masters degree or PhD in Computer Science Computer Engineering Electrical Engineering or equivalent
* Programming and debugging IO interfaces such as PCIe
* Programming and debugging of memory interfaces such as DDR4
* Programming and debugging of cache coherent SoC fabrics
* SoC validation and debug including System Verilog development RTL Simulation environments and SOC emulation environments

Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Massachusetts, Hudson

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0154664Hillsboro