Job Description

Job Description

In this position, you will be part of Emulation engineering team which is responsible for delivering Intel's Pre-Si Platform fullchip/ip Emulation models. Your responsibilities will include but not be limited to:
- Designing and validating BFMs, RTL/SW transactors needed for emulation
- Responsible for the modifications to ip, chipset, CPU, full chip RTL to make it emulation friendly
- Responsible for architecture, design, build and customer enabling of System/IP Level Emulation models
- Responsible for architecture and design of components that are modelled in the System/IP level Emulation models
- Responsible for architecture, design of RTL glue logic to make existing RTL work in Emulation platforms
- Owning model processing (synthesis and/or compile) including determination of model constraints considering factors like clock domain crossings and other
- Debugging of tough logic failures at system level
- Working with customers (design and system validation teams) in determining the emulation requirements and also providing the needed support to customers
- Participating in test plan reviews and provide feedback
- Participating in the tool development as well as design analysis and debug using vendor tools
- Providing customer debug trainings & ensuring successful project execution
- Develop solutions to problems utilizing formal education and judgment
- Design custom digital circuit blocks (custom circuit types include RAM, ROM, PLA, Register file and arithmetic Data Path
- Execute Validation Content on simulators/emulator/FPGA for digital circuit verification, performance validation
- Debug Pre-Si and post-silicon systems to root-cause logic bugs
- Participate in a complete wide range of software development tools targeted for different market segments
- Develop an understanding of new Intel architectures and software products
- Learn new Intel software products functionality and develop validation plans to ensure product quality
- Explore optimal test approaches and write test cases to increase product feature coverage

Qualifications

Qualifications:

You must be pursuing a MS in Electrical Engineering, Computer Science or related

Preferred experience:
-Logic design skills and thorough understanding at gate level
-Strong experience in debugging at the system level
-Strong understanding of Register Transfer Level (RTL) design, both at the logic level (RTL) and gate-level (post synthesis)
-Knowledge of UNIX*, VHDL and Verilog*
-Knowledge of synthesis and simulation
-Knowledge of scripting and high-level languages like Perl, Python, C/C++
-Problem-solving skills
-Willingness to work in a dynamic and team-oriented environment
-Willingness to flex between multiple roles throughout the progress of the project

Inside this Business Group
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USInternJR0152322Folsom