Job Description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Job Overview:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.

Responsibilities

* Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed.
* Analyze reports/waivers or run various tools : Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc.
* Candidate will be responsible for design/developing next generation power control systems. Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, RTL design along with interactions with verification, Synthesis & PD teams for design convergence.

Additional Responsibilities

* Digital design and development (RTL) working in close collaboration with Multi-site leads across US and India
* Developing the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoC
* Design and implement defined tasks independently.

Minimum Qualifications

* Bachelor's degree in Science, Engineering, or related field.
* 5+ years ASIC design, verification, or related work experience.

Preferred Qualifications

* 5 to 8 years of strong experience in digital front end design for ASICs
* Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains
* Familiar with UPF and power domain crossing
* Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI
* Experience in low power design methodology and clock domain crossing designs
* Experience in Spyglass Lint/CDC checks and waiver creation
* Experience in formal verification with Cadence LEC
* Understanding of full RTL to GDS flow to interact with DFT and PD teams
* Expertise in Perl, TCL language
* Expertise in post-Si debug is a plus
* Good documentation skills
* Should possess good communication skills to ensure effective interaction with Engineering Management and team members.
* Should be self-motivated with good teamwork attitude and need to function with minimal guidance or supervision

Applicants: If you are an individual with a disability and need an accommodation during the application/hiring process, please call Qualcomms toll-free number found here for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm is an equal opportunity employer and supports workforce diversity.

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.